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利用有源电感来实现超宽带低噪声放大器(UWB LNA),不但可以减小芯片面积、改善增益平坦度,而且可通过外部调节偏置电压来调谐有源电感的电感值,进而调整设计中没有考虑到的由工艺变化及封装寄生带来的增益退化。采用TSMC 0.35μm SiGe BiCMOS工艺,利用Cadence设计工具完成了放大器电路及版图的设计。在3.1～10.6GHz工作频率范围内,通过外部调节电压来调谐有源电感,可使LNA的增益S21在16～19dB范围内变化,输入输出回波损耗S11,S22均小于-10dB,噪声为2.4～3.7dB,输入3阶截点IIP3为-4dBm。整个电路芯片面积仅为0.11mm2。
The use of active inductors to achieve ultra-wideband LNAs (UWB LNAs) not only reduces chip area, improves gain flatness, but also externally adjusts the bias voltage to tune the inductance of the active inductor and adjust the design without The degradation of gain due to process variations and package parasitics is considered. Using TSMC 0.35μm SiGe BiCMOS process, using Cadence design tools to complete the amplifier circuit and layout design. In the 3.1 ~ 10.6GHz operating frequency range, through the external regulator voltage to tune the active inductance, the LNA gain S21 in the range of 16 ~ 19dB, the input and output return loss S11, S22 are less than -10dB, the noise is 2.4 ~ 3.7dB, input 3rd order intercept point IIP3 is -4dBm. The entire circuit chip area is only 0.11mm2.